A High-Level Modeling System (HLMS) refers to a computer-based circuit design tool that allows circuit designers to graphically create circuits within the HLMS. Typically, an HLMS provides a graphical design environment in which circuit designers can visually create circuits through a drag-and-drop type of design paradigm. Graphical blocks, each representing a particular circuit function, can be dragged into the graphical design environment. For example, each block can represent functions such as multiplexing, addition, multiplication, filtering, or the like. Each of these “high-level” blocks also can be associated with one or more models that may be used to simulate the circuit being developed. Communication among the blocks can be specified by drawing lines, representing signals, that graphically link the blocks placed in the graphical design environment.
Within an HLMS, simulation of a circuit is a high-level analysis that is implemented using a model for each respective block of the circuit. When the circuit is simulated within the HLMS, the models are used without first converting each block of the circuit into a lower-level implementation that specifies actual circuit elements and/or connections among the circuit elements. As a result, information derived through simulation within an HLMS may not be entirely accurate. For example, estimates of power consumption of a system specified within an HLMS will be limited to using power consumption models that exist within the HLMS for each block without regard for the eventual implementation of those blocks within a particular integrated circuit device.
In some cases, a circuit designer may decide to continue with implementation of the circuit from the HLMS implementation into a lower-level implementation. That low-level circuit design can be simulated, thereby generating more accurate simulation data. Unfortunately, the simulation data that is generated, while more accurate, corresponds to the low-level circuit elements that exist within the low-level circuit design, not to the high-level blocks within the HLMS. Any problem with the low-level circuit design that may manifest itself with respect to particular low-level circuit elements may not be traced back to the original block in the HLMS circuit design from which the low-level circuit elements were derived.